Datasheet

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RX ENABLE
CLK OUT
t
en(RPLL)
V
CC
/2
2 V
RCLK
INDETERMINATE
CLK OUT
RX ENABLE
v
cc
/2
t
dis(R)
LOW
RCLK
SN75LVDT1422
SLLS653 – JUNE 2005
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 15. Receiver Phase Lock Loop Enable Time
Figure 16. Receiver Disable Time
14