Datasheet

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Previous Cycle
TA1−1 TA0−1 TA6 TA5 TA4 TA3 TA2 TA1
TA0
TB1−1 TB0−1 TB6 TB5 TB4 TB3 TB2 TB1 TB0
Current Cycle
TA
TB
TCLK
CLK IN
Vcc/2TX ENABLE
t
dis(T)
HIGH-MPEDANCE
TCLK
SN75LVDT1422
SLLS653 JUNE 2005
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 10. 14 Parallel TTL Data Inputs Mapped to LVDS Outputs
Figure 11. Transmitter Disable Time
12