Datasheet

SN75LVDS83A
SLLS980D –JUNE 2009–REVISED JUNE 2011 www.ti.com
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
V
T
Input voltage threshold VCC/2 V
Differential steady-state output mV
|V
OD
| 250 450
voltage magnitude
R
L
= 100Ω, See Figure 4
Change in the steady-state
Δ|V
OD
| differential output voltage magnitude 1 35 mV
between opposite binary states
Steady-state common-mode output
V
OC(SS)
1.125 1.375 V
voltage
Peak-to-peak common-mode output See Figure 4
V
OC(PP)
100 mV
voltage t
R/F
(Dx, CLKin) = 1ns
I
IH
High-level input current V
IH
= VCC 25 μA
I
IL
Low-level input current V
IL
= 0 V ±10 μA
V
OY
= 0 V ±24 mA
I
OS
Short-circuit output current
V
OD
= 0 V ±12 mA
I
OZ
High-impedance state output current V
O
= 0 V to VCC ±20 μA
Input pull-down integrated resistor
R
pdn
on all inputs (Dx, CLKSEL, SHTDN, 100 kΩ
CLKIN)
disabled, all inputs at GND;
I
Q
Quiescent current 2 100 μA
SHTDN = V
IL
SHTDN = V
IH
, R
L
= 100Ω (5 places),
grayscale pattern (Figure 5) 52.3 62.2 mA
VCC = 3.3V, f
CLK
= 75MHz
SHTDN = V
IH
, R
L
= 100Ω (5 places),
50% transition density pattern
53.9 67.1 mA
(Figure 5),
VCC = 3.3V, f
CLK
= 75MHz
I
CC
Supply current (average)
SHTDN = V
IH
, R
L
= 100Ω (5 places),
worst-case pattern (Figure 6), 65 79.3 mA
VCC = 3.6V, f
CLK
= 75MHz
SHTDN = V
IH
, R
L
= 100Ω (5 places),
worst-case pattern (Figure 6), 96.8 mA
f
CLK
= 100MHz
C
I
Input capacitance 2 pF
(1) All typical values are at VCC = 3.3 V, T
A
= 25°C.
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