Datasheet

1
2
3
4
10
9
8
7
Top View
Vcc
GND
RX+
RX-
EQ
TX+
TX-
DE
1
LVCP600S
DSK
5
6
MODE
SQ_TH
Package Thermal Pad
SN75LVCP600S
www.ti.com
SLLSE81 MARCH 2011
PIN ASSIGNMENTS
It is recomended to solder the package thermal pad to the ground plane for maximum thermal performance.
PIN FUNCTIONS
PIN
I/O TYPE DESCRIPTION
NO. NAME
HIGH SPEED DIFFERENTIAL I/O
3 RX+ I, CML
Non-inverting and inverting CML differential inputs. These pins are tied to an internal voltage bias by
dual termination-resistor circuit.
4 RX I, CML
8 TX+ I, CML
Non-inverting and inverting CML differential outputs. These pins are tied to an internal voltage bias
by dual termination-resistor circuit.
7 TX I, CML
CONTROL PINS
5 EQ I, LVCMOS Selects equalization settings per Table 2. Internally tied to GND.
9 DE I, LVCMOS Selects de-emphasis settings per Table 2. Internally tied to GND.
1 MODE I, LVCMOS Selects SATA or SAS output levels per Table 2. Internally tied to GND
10 SQ_TH I, LVCMOS Selects squelch threshold settings per Table 2. Internally tied to GND
POWER
2 V
CC
Power Positive supply should be 3.3V ±10%
6 GND Power Supply ground
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Product Folder Link(s): SN75LVCP600S