Datasheet

PIN ASSIGNMENT
EN
VCC
TX_0P
TX_0N
GND
VCC
RX_1P
RX_1N
GND
NC
D0
VCC
RX_0P
RX_0N
GND
VCC
TX_1P
TX_1N
GND
D1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
SN75LVCP422DB
SN75LVCP422
SLLS972 – MARCH 2009 ................................................................................................................................................................................................... www.ti.com
DB PACKAGE
TOP VIEW
TERMINAL FUNCTIONS
PIN NAME DESCRIPTION PIN NAME DESCRIPTION
1 D0
(1)
Pre-emphasis _0 11 NC No connect
2 VCC Power 12 GND Ground
3 RX_0P Input 0, non-inverting 13 RX_1N Input 1, non-inverting
4 RX_0N Input 0, inverting 14 RX_1P Input 1, inverting
5 GND Ground 15 VCC Power
6 VCC Power 16 GND Ground
7 TX_1P Output 1, inverting 17 TX_0N Output 0, inverting
8 TX_1N Output 1, non-inverting 18 TX_0P Output 0, non-inverting
9 GND Ground 19 VCC Power
10 D1
(1)
Pre-emphasis_1 20 EN
(2)
Enable
(1) D0 and D1 are tied to VCC via an internal PU resistor.
(2) EN tied to VCC via an internal PU resistor.
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Product Folder Link(s): SN75LVCP422