Datasheet
SLLS376D− MAY 2000 − REVISED JULY 2008
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
driver electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
†
MAX UNIT
V
IK
Input clamp voltage I
I
= −18 mA −1.5 −0.8 V
SN65LBC176AQ 1.5 4 6
I
O
= 0
SN65LBC176A,
SN75LBC176A
4
V
SN65LBC176AQ 0.9 1.5 6
| V
OD
|
Differential output voltage
R
L
= 54 Ω, See Figure 1
SN65LBC176A
1 1.5 3 V
| V
OD
|
Differential output voltage
R
L
= 54 Ω,
See Figure 1
SN75LBC176A 1.1 1.5 3
V
SN65LBC176AQ 0.9 1.5 6
V
V
test
= −7 V to 12 V, See Figure 2
SN65LBC176A 1 1.5 3 V
V
test
= −7 V to 12 V, See Figure 2
SN75LBC176A 1.1 1.5 3 V
∆| V
OD
|
Change in magnitude of
differential output voltage
See Figures 1 and 2 −0.2 0.2 V
Steady-state common-mode
SN65LBC176AQ 1.8 2.4 3
V
OC(SS)
Steady-state common-mode
output voltage
See Figure 1
SN65LBC176A,
SN75LBC176A
1.8 2.4 2.8
V
Change in steady-state
See Figure 1
SN65LBC176AQ −0.2 0.2
V
∆ V
OC(SS
)
Change in steady-state
common-mode output voltage
SN65LBC176A,
SN75LBC176A
−0.1 0.1
I
OZ
High-impedance output
current
See receiver input currents
I
IH
High-level enable input
current
V
I
= 2 V −100 µA
I
IL
Low-level enable input current V
I
= 0.8 V −100 µA
I
OS
Short-circuit output current −7 V ≤ V
O
≤ 12 V −250 250 mA
V
I
= 0 or V
CC
,
Receiver disabled and driver enabled 5 9
I
CC
Supply current
V
I
= 0 or V
CC
,
No load
Receiver disabled and driver disabled 0.4 0.7
mA
I
CC
Supply current
No load
Receiver enabled and driver enabled 8.5 15
mA
†
All typical values are at V
CC
= 5 V, T
A
= 25°C.
driver switching characteristics over recommended operating conditions (unless otherwise
noted)
PARAMETER
TEST
CONDITIONS
SN65LBC176AQ
SN65LBC176A
SN75LBC176A
UNIT
PARAMETER
CONDITIONS
MIN TYP
†
MAX MIN TYP
†
MAX
UNIT
t
PLH
Propagation delay time, low-to-high-level output 2 12 2 6 12 ns
t
PHL
Propagation delay time, high-to-low-level output
R
L
= 54 Ω,
2 12 2 6 12 ns
t
sk(p)
Pulse skew (| t
PLH
− t
PHL
|)
R
L
= 54 Ω
,
C
L
= 50 pF,
See Figure 3
2 0.3 1 ns
t
r
Differential output signal rise time
C
L
= 50 pF,
See Figure 3
1.2 11 4 7.5 11 ns
t
f
Differential output signal fall time 1.2 11 4 7.5 11 ns
t
PZH
Propagation delay time, high-impedance-to-high-
level output
R
L
= 110 Ω,
See Figure 4
22 12 22 ns
t
PZL
Propagation delay time, high-impedance-to-low-
level output
R
L
= 110 Ω,
See Figure 5
25 12 22 ns
t
PHZ
Propagation delay time, high-level-to-high-
impedance output
R
L
= 110 Ω,
See Figure 4
22 12 22 ns
t
PLZ
Propagation delay time, low-level-to-high-
impedance output
R
L
= 110 Ω,
See Figure 5
22 12 22 ns
†
All typical values are at V
CC
= 5 V, T
A
= 25°C.