Datasheet

SCL

SDA

Acknowledge

Slave Address

Data

DataOutput

byTransmitter

DataOutput

byReceiver

SCL From

Master

START

Condition

ClockPulsefor

Acknowledgement

Not Acknowledge

Acknowledge

SDA

SCL

DataLine

Stable;

DataValid

ChangeofData Allowed

SN75DP139

SLLS977D –APRIL 2009–REVISED JULY 2013

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with the addressed slave. All I

C compatible devices must recognize the stop condition. Upon the receipt of a

stop condition, all devices know that the bus is released, and they wait for a start condition followed by a

matching address.

Figure 26. I

C Bit Transfer

Figure 27. I

C Acknowledge

Figure 28. I

C Address and Data Cycles

During a read cycle, the slave receiver will acknowledge the initial address byte if it decodes the address as its

address. Following this initial acknowledge by the slave, the master device becomes a receiver and

acknowledges data bytes sent by the slave. When the master has received all of the requested data bytes from

the slave, the not acknowledge (A) condition is initiated by the master by keeping the SDA signal high just before

it asserts the stop (P) condition. This sequence terminates a read cycle as shown in Figure 29 and Figure 30.

See Example – Reading from the SN75DP139 section for more information.

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