Datasheet

SN75DP139
www.ti.com SLLS977D –APRIL 2009–REVISED JULY 2013
AUX / I
2
C pins
The SN75DP139 utilizes an active I
2
C repeater. The repeater is designed to isolate the parasitic effects of the
system in order to aid with system level compliance.
In addition to the I
2
C repeater, the SN75DP139 also supports the connector detection I
2
C register. This register
is enabled via the I
2
C_EN pin. When active an internal memory register is readable via the AUX_I
2
C I/O. The
functionality of this register block is described in the APPLICATION INFORMATION section.
ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
L
Low input current V
CC
= 3.6 V, V
I
= 0 V –10 10 μA
I
lkg(AUX)
Input leakage current AUX_I
2
C pins V
CC
= 3.6V, V
I
= 3.6 V –10 10 μA
(SCL_SOURCE,
SDA_SOURCE)
C
IO(AUX)
Input/Output capacitance AUX_I
2
C pins DC bias = 1.65 V, AC = 2.1Vp-p, 15 pF
(SCL_SOURCE, f = 100 kHz
SDA_SOURCE)
V
IH(AUX)
High-level input voltage AUX_I
2
C pins 1.6 3.6 V
(SCL_SOURCE,
SDA_SOURCE)
V
IL1(AUX)
Low-level input voltage AUX_I
2
C pins OVS = HIGH –0.2 0.36 V
(SCL_SOURCE,
SDA_SOURCE)
V
OL1(AUX)
Low-level output voltage AUX_I
2
C pins I
O
= 3 mA, OVS = HIGH 0.6 0.7 V
(SCL_SOURCE,
SDA_SOURCE)
V
IL2(AUX)
Low-level input voltage AUX_I
2
C pins OVS = Hi-Z –0.2 0.36 V
(SCL_SOURCE,
SDA_SOURCE)
V
OL2(AUX)
Low-level output voltage AUX_I
2
C pins I
O
= 3 mA, OVS = Hi-Z 0.5 0.6 V
(SCL_SOURCE,
SDA_SOURCE)
V
IL3(AUX)
Low-level input voltage AUX_I
2
C pins OVS = Low –0.2 0.27 V
(SCL_SOURCE,
SDA_SOURCE)
V
OL3(AUX)
Low-level output voltage AUX_I
2
C pins I
O
= 3 mA, OVS = Low 0.4 0.5 V
(SCL_SOURCE,
SDA_SOURCE)
I
lkg(I2C)
Input leakage current I
2
C SDA/SCL pins V
CC
= 3.6 V, V
I
= 4.95 V –10 10 μA
(SCL_SINK,
SDA_SINK)
C
IO(I2C)
Input/Output capacitance I
2
C SDA/SCL pins DC bias = 2.5 V, AC = 3.5Vp-p, f 15 pF
(SCL_SINK, = 100 kHz
SDA_SINK)
V
IH(I2C)
High-level input voltage I
2
C SDA/SCL pins 2.1 5.5 V
(SCL_SINK,
SDA_SINK)
V
IL(I2C)
Low-level input voltage I
2
C SDA/SCL pins –0.2 1.5 V
(SCL_SINK,
SDA_SINK)
V
OL(I2C)
Low-level output voltage I
2
C SDA/SCL pins I
O
= 3mA 0.2 V
(SCL_SINK,
SDA_SINK)
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