Datasheet

SN75DP139
www.ti.com SLLS977D –APRIL 2009–REVISED JULY 2013
THERMAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX
(1)
UNIT
RGZ package 10.9
Junction-to-board thermal
θ
JB
°C/W
resistance
RSB package 10.8
RGZ package 22.5
Junction-to-case-top thermal
θ
JCT
°C/W
resistance
RSB package 24.4
RGZ package 10.9
Junction-to-board thermal
ψ
JB
High-K board
(2)
°C/W
resistance metric
RSB package 10.8
RGZ package 0.5
Junction-to-top thermal resistance
ψ
JT
High-K board
(2)
°C/W
metric
RSB package 0.4
HDMI Mode: OE_N = 0V, DDC_EN = 3.6V, V
CC
= 3.6V,
ML: VID_PP = 1200mV, 3Gbps TMDS pattern
P
D1
Device power dissipation
(3)
270+146 396+146 mW
AUX: V
I
= 3.3V, 100 kHz PRBS
HPD: HPD_SINK = 5V, I2C_EN = 3.6V, SRC = Hi-Z
DVI Mode: OE_N = 0V, DDC_EN = 3.6V, V
CC
= 3.6V,
ML: VID_PP = 1200mV, 3Gbps TMDS pattern
P
D2
Device power dissipation
(3)
214+146 306+146 mW
AUX: V
I
= 3.3V, 100 kHz PRBS
HPD: HPD_SINK= 5V, I2C_EN = 0V, SRC = Hi-Z
Device power dissipation under low
OE_N = 5V, DDC_EN = 0V, HPDINV = 0V,
P
SD1
power with 18 54 μW
HPD_SINK = 0V
HPDINV = LOW
Device power dissipation under low
P
SD2
power with OE_N = 5V, DDC_EN = 0V, HPDINV = 5V 1.7 3 mW
HPDINV =HIGH
Device power dissipation under low
P
SD3
power with DDC enabled with OE_N = 5V, DDC_EN = 3.6V, HPDINV = 5V 16.5 29 mW
HPDINV = HIGH
Device power dissipation under low
P
SD4
power with DDC enabled with OE_N = 5V, DDC_EN = 3.6V, HPDINV = 0V 15 26 mW
HPDINV = LOW
(1) The maximum rating is simulated under 3.6V V
CC
unless otherwise noted.
(2) Test conditions for ψ
JB
and ψ
JT
are clarified in TI document SPRA953, IC Package Thermal Metrics.
(3) Power dissipation is the sum of the power consumption from the VCC pins, plus the 146 mW of power from the AVCC (HDMI/DVI
Receiver Termination Supply).
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V
CC
Supply Voltage 3 3.3 3.6 V
T
A
Operating free-air temperature 0 85 °C
MAIN LINK DIFFERENTIAL INPUT PINS
V
ID_PP
Peak-to-peak AC input differential voltage 0.15 1.2 V
RGZ package 0.25 3.4
d
R
Data rate Gbps
RSB package 0.25 3.4
t
rise fall time
Input Signal Rise and Fall time (20%-80%) 75 ps
V
PRE
Pre-emphasis on the Input Signal at IN_Dx pins 0 0 0 db
TMDS DIFFERENTIAL OUTPUT PINS
AV
CC
TMDS output termination voltage 3 3.3 3.6 V
RGZ package 0.25 3.4
d
R
Data rate Gbps
RSB package 0.25 3.4
R
T
Termination resistance 45 50 55 Ω
R
Vsadj
TMDS output swing voltage bias resistor
(1)
3.65 4.02 kΩ
(1) R
Vsadj
resistor controls the SN75DP139 Driver output voltage swing and thus helps in meeting system compliance. It is recommended
that R
Vsadj
resistor should be above the MIN value as indicated in the RECOMMENDED OPERATING CONDITIONS table, however for
NOM and MAX value, Figure 24 could be used as reference. It is important to note that system level losses, AV
CC
and R
T
variation
affect R
Vsadj
resistor selection. Worse case variation on system level losses, AV
CC,
R
T
could make R
Vsadj
resistor value of 4.02 kΩ ±5%
result in non-compliant TMDS output voltage swing. In such cases Figure 24 could be used as reference.
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