Datasheet
SWITCHING CHARACTERISTICS
Driver
50 W
Receiver
D+
D-
V
D+
V
D-
V
ID
0.5 pF
Y
Z
V
Y
V
Z
100 nF
100 nF
0Vto2V
V
Iterm
50 W
50 W
50 W
V =V -V
V =(V +V )
2
ID D+ D-
ICM D+ D-
V =V -V
V =(V +V )
2
OD Y Z
OC Y Z
Output
Input
DV
I/O
InputEdgeRate
20%to80%
80ps
t
R/FDP
DV
I/O
SN75DP122A
www.ti.com
............................................................................................................................................................................................ SLLS939 – NOVEMBER 2008
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
R/F(DP)
Output edge rate (20% – 80%) Input edge rate = 80 ps (20% – 80%) 115 160 ps
t
PD
Propagation delay time F= 1 MHz, V
ID
= 400 mV 227 ps
t
SK(1)
Intra-pair skew F= 1 MHz, V
ID
= 400 mV 20 ps
t
SK(2)
Inter-pair skew F= 1 MHz, V
ID
= 400 mV 40 ps
t
DPJIT(PP)
Peak-to-peak output residual jitter d
R
= 2.7 Gbps, V
ID
= 400 mV, PRBS 27-1 25 35 ps
Figure 10. Main Link Test Circuit
Figure 11. Main Link Δ V
I/O
and Edge Rate Measurements
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): SN75DP122A