Datasheet

SN75C185
LOW-POWER MULTIPLE DRIVERS AND RECEIVERS
SLLS065F – AUGUST 1989 – REVISED JANUARY 2000
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DRIVER SECTION
electrical characteristics over operating free-air temperature range, V
DD
= 12 V, V
SS
= –12 V,
V
CC
= 5 V ±10% (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN
TYP
†
MAX UNIT
V
OH
High level out
p
ut voltage
V
IL
= 0.8 V, R
L
= 3 kΩ,
V
DD
= 5 V, V
SS
= –5 V 4 4.5
V
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
IL
,
See Figure 1
L
,
V
DD
= 12 V V
SS
= –12 V 10 10.8
V
V
OL
Low-level output voltage V
IH
= 0.8 V, R
L
= 3 kΩ,
V
DD
= 5 V, V
SS
= –5 V –4.4 –4
V
V
OL
g
(see Note 3)
IH
,
See Figure 1
L
,
V
DD
= 12 V V
SS
= –12 V –10.7 –10
V
I
IH
High-level input current V
I
= 5 V, See Figure 2 1 µA
I
IL
Low-level input current V
I
= 0, See Figure 2 –1 µA
I
OS(H)
High-level short-circuit V
I
= 0.8 V,
V
O
= 0 or V
O
= V
SS
,
45
12
19 5
mA
I
OS(H)
g
output current (see Note 4)
I
,
See FIgure 1
O O SS,
–
4
.
5
–
12
–
19
.
5
mA
I
OS(L)
Low-level short-circuit V
I
= 2 V, V
O
= 0 or V
O
= V
DD
,
45
12
19 5
mA
I
OS(L)
output current (see Note 4)
I
,
See Figure 1
OODD
,
4
.
5
12
19
.
5
mA
r
o
Output resistance
V
DD
= V
SS
= V
CC
= 0,
See Note 5
V
O
= – 2 V to 2 V,
300 400 Ω
†
All typical values are at T
A
= 25°C.
NOTES: 3. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic
levels only, e.g., if –10 V is a maximum, the typical value is a more negative voltage.
4. Not more than one output should be shorted at one time.
5. Test conditions are those specified by TIA/EIA-232-F.
switching characteristics, V
DD
= 12 V, V
SS
= –12 V, V
CC
= 5 V ±10%, T
A
= 25°C (unless otherwise
noted) (see Figure 3)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay time,
low- to high-level output (see Note 6)
1.2 3 µs
t
PHL
Propagation delay time,
high- to low-level output (see Note 6)
R
L
= 3 kΩ to 7 kΩ, C
L
= 15 pF
2.5 3.5 µs
t
TLH
Transition time, low- to high-level output 0.53 2 3.2 µs
t
THL
Transition time, high- to low-level output 0.53 2 3.2 µs
t
TLH
Transition time, low- to high-level output (see Note 7)
R
L
=3kΩ to7kΩ
C
L
= 2500
p
F
1 µs
t
THL
Transition time, high- to low-level output (see Note 7)
R
L
=
3
kΩ
to
7
kΩ
,
C
L
=
2500
pF
1 µs
S
R
Output slew rate (see Note 7) R
L
= 3 kΩ to 7 kΩ, C
L
= 15 pF 4 10 30 V/µs
NOTES: 6. t
PHL
and t
PLH
include the additional time due to on-chip slew rate and are measured at the 50% points.
7. Measured between 3-V and –3-V points of output waveform TIA/EIA-232-F conditions), and all unused inputs are tied either high
or low.