Datasheet
SN65C1154, SN75C1154
QUADRUPLE LOW-POWER DRIVERS/RECEIVERS
SLLS151D – DECEMBER 1988 – REVISED APRIL 2003
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DRIVER SECTION
electrical characteristics over operating free-air temperature range, V
DD
= 12 V, V
SS
= –12 V,
V
CC
= 5 V ±10% (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
†
MAX UNIT
V
OH
High level out
p
ut voltage
V
IL
= 0.8 V, R
L
= 3 kΩ,
V
DD
= 5 V, V
SS
= –5 V 4 4.5
V
V
OH
High
-
level
output
voltage
IL
,
See Figure 1
L
,
V
DD
= 12 V, V
SS
= –12 V 10 10.8
V
V
OL
Low-level output volta
g
e V
IH
= 2 V, R
L
= 3 kΩ,
V
DD
= 5 V, V
SS
= –5 V –4.4 –4
V
V
OL
g
(see Note 4)
IH
,
See Figure 1
L
,
V
DD
= 12 V, V
SS
= –12 V –10.7 –10
V
I
IH
High-level input current V
I
= 5 V, See Figure 2 1 µA
I
IL
Low-level input current V
I
= 0, See Figure 2 –1 µA
I
OS(H)
Hi
g
h-level short-circuit
V
I
=08V
V
O
=0orV
SS
See Figure 1
75
12
19 5
mA
I
OS(H)
g
output current
‡
V
I
=
0
.
8
V
,
V
O
=
0
or
V
SS
,
See
Figure
1
–
7
.
5
–
12
–
19
.
5
mA
I
OS(L)
Low-level short-circuit
V
I
=2V
V
O
=0orV
DD
See Figure 1
75
12
19 5
mA
I
OS(L)
output current
‡
V
I
=
2
V
,
V
O
=
0
or
V
DD
,
See
Figure
1
7
.
5
12
19
.
5
mA
I
DD
Su
pp
ly current from V
DD
No load
,
V
DD
= 5 V, V
SS
= –5 V 115 250
µA
I
DD
Supply
current
from
V
DD
No
load,
All inputs at 2 V or 0.8 V
V
DD
= 12 V, V
SS
= –12 V 115 250
µ
A
I
SS
Su
pp
ly current from V
SS
No load
,
V
DD
= 5 V, V
SS
= –5 V –115 –250
µA
I
SS
Supply
current
from
V
SS
No
load,
All inputs at 2 V or 0.8 V
V
DD
= 12 V, V
SS
= –12 V –115 –250
µ
A
r
o
Output resistance V
DD
= V
SS
= V
CC
= 0, V
O
= –2 V to 2 V, See Note 5 300 400 Ω
†
All typical values are at T
A
= 25°C.
‡
Not more than one output should be shorted at one time.
NOTES: 4. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic
levels only.
5. Test conditions are those specified by TIA/EIA-232-F.
switching characteristics, V
DD
= 12 V, V
SS
= –12 V, V
CC
= 5 V ±10%, T
A
= 25°C (see Figure 3)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay time, low- to high-level output
§
R
L
= 3 to 7 kΩ, CL = 15 pF 1.2 3 µs
t
PHL
Propagation delay time, high- to low-level output
§
R
L
= 3 to 7 kΩ, CL = 15 pF 2.5 3.5 µs
t
TLH
Transition time, low- to high-level output
¶
R
L
= 3 to 7 kΩ, CL = 15 pF 0.53 2 3.2 µs
t
THL
Transition time, high- to low-level output
¶
R
L
= 3 to 7 kΩ, CL = 15 pF 0.53 2 3.2 µs
t
TLH
Transition time, low- to high-level output
#
R
L
= 3 to 7 kΩ, C
L
= 2500 pF 1 2 µs
t
THL
Transition time, high- to low-level output
#
R
L
= 3 to 7 kΩ, C
L
= 2500 pF 1 2 µs
SR Output slew rate R
L
= 3 to 7 kΩ, CL = 15 pF 4 10 30 V/µs
§
t
PHL
and t
PLH
include the additional time due to on-chip slew rate control and are measured at the 50% points.
¶
Measured between 10% and 90% points of output waveform
#
Measured between 3 V and –3 V points of output waveform (TIA/EIA-232-F conditions) with all unused inputs tied either high or low