Datasheet

SN75177B, SN75178B
DIFFERENTIAL BUS REPEATERS
SLLS002C – D2606, JULY 1985 – REVISED FEBRUARY 1993
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
2–4
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
MAX UNIT
V
IK
Input clamp voltage I
I
= –18 mA 1.5 V
V
O
Output voltage I
O
= 0 0 6 V
|V
OD1
| Differential output voltage I
O
= 0 1.5 6 V
R
L
= 100
See Figure 1
1/2 V
OD1
|V
OD2
| Differential output voltage
R
L
=
100
,
See
Fig
u
re
1
OD1
or 2
§
V
R
L
= 54 Ω, See Figure 1 1.5 2.5 5
|V
OD3
| Differential output voltage See Note 3 1.5 5 V
|V
OD|
Change in magnitude of
V
|V
OD|
gg
diferential output voltage
R54or 100
See Figure 1
.
V
V
OC
Common mode out
p
ut voltage
R
L
=
54
or
100
,
S
ee
Fi
gure
1
3
V
V
OC
Common
-
mode
o
u
tp
u
t
v
oltage
–1
V
|V
OC
|
Change in magnitude of
V
|V
OC
|
gg
common-mode output voltage
.
V
I
O
Output current V
CC
= 0, V
O
= –7 V to 12 V ±100 µA
I
OZ
High-impedance-state output current V
O
= –7 V to 12 V ±100 µA
I
IH
High-level input current V
I
= 2.4 V 20 µA
I
IL
Low-level input current V
I
= 0.4 V 400 µA
V
O
= –7 V 250
I
OS
Short-circuit output current
V
O
= V
CC
250
mA
V
O
= 12 V 250
I
CC
Su
pp
ly current (total
p
ackage)
No load
Outputs enabled 57 70
mA
I
CC
S
u
ppl
y
c
u
rrent
(total
package)
No
load
Outputs disabled 26 35
mA
All typical values are at V
CC
= 5 V and T
A
= 25°C.
|V
OD
| and |V
OC
| are the changes in magnitude of V
OD
and V
OC
, respectively, that occur when the input is changed from a high level to a low
level.
§
The minimum V
OD2
with a 100- load is either 1/2 V
OD1
or 2, whichever is greater.
NOTE 3: See Figure 3.5 of EIA Standard RS-485.
switching characteristics, V
CC
= 5 V, T
A
= 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
dD
Differential-output delay time
R
L
=54 See Figure 3
15 20 ns
t
tD
Differential-output transition time
R
L
=
54
,
See
Fig
u
re
3
20 30 ns
t
PZH
Output enable time to high level R
L
= 110 , See Figure 4 85 120 ns
t
PZL
Output enable time to low level R
L
= 110 Ω, See Figure 5 40 60 ns
t
PHZ
Output disable time from high level R
L
= 110 , See Figure 4 150 250 ns
t
PLZ
Output disable time from low level R
L
= 110 Ω, See Figure 5 20 30 ns