Datasheet

SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D – JULY 1985 – REVISED APRIL 2003
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics, V
CC
= 5 V, C
L
= 15 pF, T
A
= 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay time, low- to high-level output
V
ID
= 0 to 3 V See Figure 6
21 35
ns
t
PHL
Propagation delay time, high- to low-level output
V
ID
=
0
to
3
V
,
See
Figure
6
23 35
ns
t
PZH
Output enable time to high level
See Figure 7
10 20
ns
t
PZL
Output enable time to low level
See
Figure
7
12 20
ns
t
PHZ
Output disable time from high level
See Figure 7
20 35
ns
t
PLZ
Output disable time from low level
See
Figure
7
17 25
ns
PARAMETER MEASUREMENT INFORMATION
Figure 1. Driver V
OD
and V
OC
2
R
L
V
OD2
V
OC
2
R
L
Figure 2. Receiver V
OH
and V
OL
V
ID
V
OL
V
OH
–I
OH
+I
OL
3 V
VOLTAGE WAVEFORMS
t
t(OD)
t
d(OD)
1.5 V
10%
t
t(OD)
≈2.5 V
≈–2.5 V
90%
50%
Output
t
d(OD)
0 V
3 V
1.5 V
Input
TEST CIRCUIT
Output
C
L
= 50 pF
(see Note A)
50 Ω
R
L
= 54 Ω
Generator
(see Note B)
50%
10%
NOTES: A. C
L
includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, t
r
≤ 6 ns, t
f
≤ 6 ns,
Z
O
= 50 Ω.
Figure 3. Driver Test Circuit and Voltage Waveforms