Datasheet

SN75176A
DIFFERENTIAL BUS TRANSCEIVER
SLLS100A – JUNE 1984 – REVISED MAY 1995
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
V
OH
0.5 V
≈ 1.3 V
t
PHZ
Output
Input
1.5 V
0 V
3 V
S1 to 1.5 V
S2 Closed
S3 Closed
t
PLZ
≈ 1.3 V
V
OL
0.5 V
Output
Input
1.5 V
0 V
3 V
≈ 4.5 V
V
OL
1.5 V
S3 Open
S2 Closed
S1 to –1.5 V
0 V
1.5 V
3 V
t
PZL
Output
Input
0 V
1.5 V
V
OH
0 V
Output
Input
t
PZH
S3 Closed
S2 Open
S1 to 1.5 V
1.5 V
3 V
TEST CIRCUIT
50 Ω
1N916 or Equivalent
S3
5 V
S2
2 kΩ
5 kΩ
S1
–1.5 V
1.5 V
VOLTAGE WAVEFORMS
S1 to –1.5 V
S2 Closed
S3 Closed
Generator
(see Note A)
CL = 15 pF
(see Note B)
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, 50% duty cycle, t
r
≤ 6 ns, t
f
≤ 6 ns,
Z
O
= 50 Ω.
B. C
L
includes probe and jig capacitance.
Figure 7. Receiver Test Circuit and Voltage Waveforms