Datasheet

SN75176A
DIFFERENTIAL BUS TRANSCEIVER
SLLS100A – JUNE 1984 – REVISED MAY 1995
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
2
R
L
V
OD2
V
OC
2
R
L
Figure 1. Driver V
OD
and V
OC
V
OL
V
OH
–I
OH
+I
OL
V
ID
0 V
Figure 2. Receiver V
OH
and V
OL
3 V
VOLTAGE WAVEFORMS
t
t(OD)
t
d(OD)
1.5 V
10%
t
t(OD)
≈ 2.5 V
≈ – 2.5 V
90%
50%
Output
t
d(OD)
0 V
3 V
1.5 V
Input
TEST CIRCUIT
Output
C
L
= 50 pF
(see Note B)
50 Ω
R
L
= 60 Ω
Generator
(see Note A)
50%
10%
C
L
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, 50% duty cycle, t
r
≤ 6 ns, t
f
≤ 6 ns,
Z
O
= 50 Ω.
B. C
L
includes probe and jig capacitance.
Figure 3. Driver Test Circuit and Voltage Waveforms
VOLTAGE WAVEFORMS
t
PHZ
1.5 V
2.3 V
0.5 V
0 V
3 V
t
PZH
Output
Input
1.5 V
S1
0 or 3 V
Output
C
L
= 50 pF
(see Note B)
TEST CIRCUIT
50 Ω
V
OH
V
off
≈ 0 V
R
L
= 110 Ω
Generator
(see Note A)
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, 50% duty cycle, t
r
≤ 6 ns, t
f
≤ 6 ns,
Z
O
= 50 Ω.
B. C
L
includes probe and jig capacitance.
Figure 4. Driver Test Circuit and Voltage Waveforms