Datasheet

SN55173, SN65173, SN75173
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS144E – OCTOBER 1980 – REVISED APRIL 2000
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
4Y
3Y
2Y
1Y
13
11
5
3
15
14
9
10
7
6
1
2
12
4
4B
4A
3B
3A
2B
2A
1B
1A
G
G
Pin numbers shown are for the D, J, and N packages.
schematics of inputs and outputs
TYPICAL OF ALL OUTPUTSEQUIVALENT OF G OR G INPUTEQUIVALENT OF EACH A OR B INPUT
Output
V
CC
8.3 kΩ
NOM
85 Ω
NOM
V
CC
Input
20 kΩ
NOM
960 Ω
NOM
100 kΩ
NOM
B Pins Only
100 kΩ
NOM
A Pins Only
960 Ω
NOM
V
CC
Input