Datasheet

SN751177, SN751178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS059D – FEBRUARY 1990 – REVISED MAY 1999
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics at V
CC
= 5 V, C
L
= 15 pF, T
A
= 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay time, low- to high-level output
V
ID
= 15Vto15V
See Figure 7
20 35 ns
t
PHL
Propagation delay time, high- to low-level output
V
ID
= –
1
.
5
V
to
1
.
5
V
,
See
Fig
u
re
7
22 35 ns
t
PZH
Output enable time to high level 17 25 ns
t
PZL
Output enable time to low level
SN751177
See Figure 8
20 27 ns
t
PHZ
Output disable time from high level
SN751177
See
Fig
u
re
8
25 40 ns
t
PLZ
Output disable time from low level 30 40 ns
PARAMETER MEASUREMENT INFORMATION
V
OC
V
OD2
R
L
2
R
L
2
Figure 1. Driver Test Circuit, V
OD
and V
OC
V
OL
V
OH
–I
OH
+I
OL
V
ID
Figure 2. Receiver Test Circuit, V
OH
and V
OL
TEST CIRCUIT
50 Ω
3 V
Output
R
L
= 54 Ω
Generator
(see Note B)
C
L
= 50 pF
(see Note A)
VOLTAGE WAVEFORMS
Output
Input
t
d(OD)
t
d(OD)
t
t(OD)
t
t(OD)
≈ 2.5 V
0 V
3 V
≈ –2.5 V
NOTES: A. C
L
includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, Z
O
= 50 Ω, t
r
≤ 6 ns, t
f
≤ 6 ns.
1.5 V 1.5 V
90% 90%
50%
10%
50%
10%
Figure 3. Driver Differential Output-Delay and Transition-Time Test Circuit and Voltage Waveforms