Datasheet

SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
&
2YS
2YP
1YS
1YP
R
T
RSP
12
13
10
9
11
4
3
6
7
5
2RTC
2STRB
2R
T
2A
2B
1RTC
1STRB
1R
T
1A
1B
15
14
1
2
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
11
9
10
12
13
2YP (Pullup)
2YS (Sink)
14
15
2B
2A
2R
T
2RTC
2STRB
1STRB
1RTC
1R
T
1A
1B
1
2
1YP (Pullup)
3
4
6
7
5
1YS (Sink)