Datasheet

SN55107A, SN75107A, SN75107B, SN75108A
DUAL LINE RECEIVERS
SLLS069D – JANUARY 1977 – REVISED APRIL 1998
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
DIFFERENTIAL INPUTS
STROBES
OUTPUT
A – B
G S
Y
V
ID
≥ 25 mV X X H
X L H
–25 mV < V
ID
< 25 mV
L X H
H H Indeterminate
X L H
V
ID
≤ –25 mV
L X H
H H L
H = high level, L = low level, X = irrelevant
logic symbol
†
2G
2B
2A
1G
1B
1A
S
8
11
12
5
2
6
2Y
1Y
9
4
EN
SN75108A
1
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
2G
2B
2A
1G
1B
1A
S
8
11
12
5
2
1
6
2Y
1Y
9
4
EN
SN55107A, SN75107A, and SN75107B
logic diagram (positive logic)
2B
2A
2G
1G
1B
1A
S
11
12
8
5
2
1
6
2Y
1Y
9
4