Datasheet

SN74V263, SN74V273, SN74V283, SN74V293
8192 × 18, 16384 × 18, 32768 × 18, 65536 × 18
3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SCAS669D – JUNE 2001 – REVISED FEBRUARY 2003
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
30 pF
(see Note B)
510 Ω
330 Ω
3.3 V
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load for t
CLK
= 10 ns, 15 ns
Output Load for t
CLK
= 7.5 ns
GND to 3.0 V
3 ns (see Note A)
1.5 V
1.5 V
See A
See B and C
AC TEST CONDITIONS
50 Ω
V
CC
/2
Z
O
= 50 Ω
I/O
B. AC TEST LOAD
FOR 6- AND 7.5-SPEED GRADE
A. OUTPUT LOAD CIRCUIT FOR 10- AND 15-SPEED GRADES
0
1
2
3
4
5
6
0 20 40 60 80 100 120 140 160 180 200
C. LUMPED CAPACITIVE LOAD, TYPICAL DERATING
Capacitance – pF
Typical t∆
CD
– ns
NOTES: A. For 133-MHz and 166-MHz operation, input rise/fall times are 1.5 ns.
B. Includes probe and jig capacitance
Figure 2. Load Circuits