Datasheet

SN74V263, SN74V273, SN74V283, SN74V293
8192 × 18, 16384 × 18, 32768 × 18, 65536 × 18
3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SCAS669D JUNE 2001 REVISED FEBRUARY 2003
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Terminal voltage range with respect to GND, V
TERM
0.5 V to 4.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN TYP MAX UNIT
V
CC
Supply voltage (see Note 1) 3.15 3.3 3.45 V
GND Supply voltage 0 0 0 V
V
IH
High-level input voltage (see Note 2) 2 5.5 V
V
IL
Low-level input voltage 0.8 V
T
A
Operating free-air temperature 0 70 °C
NOTES: 1. V
CC
= 3.3 V ± 0.15 V, JESD8-A compliant
2. Outputs are not 5-V tolerant.
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN MAX UNIT
V
OH
I
OH
= 2 mA 2.4 V
V
OL
I
OL
= 8 mA 0.4 V
I
I
V
I
= 0.4 V to V
CC
±1 µA
I
OZ
OE V
IH
, V
O
= 0.4 V to V
CC
±10 µA
I
CC1
×9 input to ×9 output, See Notes 3, 4, and 5 30 mA
I
CC2
×18 input to ×18 output, See Notes 3, 4, and 5 35 mA
I
CC3
Standby, See Notes 3 and 6 15 mA
C
IN
V
I
= 0, T
A
= 25°C, f = 1 MHz 10 pF
C
OUT
V
O
= 0, T
A
= 25°C, f = 1 MHz, Output deselected (OE V
IH
) 10 pF
NOTES: 3. Tested with outputs open (I
OUT
= 0)
4. RCLK and WCLK switch at 20 MHz and data inputs switch at 10 MHz.
5. For ×18 bus widths, typical I
CC2
= 5 + f
S
+ 0.02 × C
L
× f
S
(in mA); for ×9 bus widths, typical I
CC1
= 5 + 0.775 f
S
+ 0.02 × C
L
× f
S
(in
mA). These equations are valid under the following conditions:
V
CC
= 3.3 V, T
A
= 25°C, f
S
= WCLK frequency = RCLK frequency (in MHz, using TTL levels), data switching at f
S
/2, C
L
= capacitive
load (in pF).
6. All inputs = (V
CC
0.2 V) or (GND + 0.2 V), except RCLK and WCLK, which switch at 20 MHz.