Datasheet

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DESCRIPTION/ORDERING INFORMATION (CONTINUED)
SN74LVTH32373
3.3-V ABT 32-BIT TRANSPARENT D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCBS751B – OCTOBER 2000 – REVISED DECEMBER 2006
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
When V
CC
is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
LFBGA – GKE SN74LVTH32273GKER
–40 ° C to 85 ° C Reel of 1000 HV373
LFBGA – ZKE (Pb-free) SN74LVTH32273ZKER
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(EACH 8-BIT LATCH)
INPUTS
OUTPUT
Q
OE LE D
L H H H
L H L L
L L X Q
0
H X X Z
2
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