Datasheet

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SCBS710F − OCTOBER 1997 − REVISED OCTOBER 2003
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information
The ’LVTH2952 devices consist of two 8-bit back-to-back registers that store data flowing in both directions
between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition
of the clock (CLKAB or CLKBA) input, provided that the clock-enable (CLKENAB
or CLKENBA) input is low.
Taking the output-enable (OEAB
or OEBA) input low accesses the data on either port.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup
or pulldown resistors with the bus-hold circuitry is not recommended.
When V
CC
is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE
should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
†
INPUTS
OUTPUT
CLKENAB CLKAB OEAB A
OUTPUT
B
H X L X B
0
‡
X H or L L X B
0
‡
L ↑ LL L
L ↑ LH H
X X H X Z
†
A-to-B data flow is shown; B-to-A data flow is similar,
but uses CLKENBA
, CLKBA, and OEBA.
‡
Level of B before the indicated steady-state input
conditions were established