Datasheet
SCBS698G − JULY 1997 − REVISED MAY 2004
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 2)
SN54LVTH16646 SN74LVTH16646
V
CC
= 3.3 V
± 0.3 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
V
CC
= 2.7 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
f
clock
Clock frequency 150 150 150 150 MHz
t
w
Pulse duration, CLK high or low 3.3 3.3 3.3 3.3 ns
t
su
Setup time,
Data high 1.2 1.5 1.2 1.5
ns
t
su
Setup time,
A or B before CLKAB↑ or CLKBA↑
Data low
2 2.8 2 2.8
ns
t
h
Hold time,
Data high 0.5 0 0.5 0
ns
t
h
Hold time,
A or B after CLKAB↑ or CLKBA↑
Data low 0.5 0.5 0.5 0.5
ns
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF
(unless otherwise noted) (see Figure 2)
SN54LVTH16646 SN74LVTH16646
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
V
CC
= 3.3 V
± 0.3 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
V
CC
= 2.7 V
UNIT
(INPUT)
(OUTPUT)
MIN MAX MIN MAX MIN TYP
†
MAX MIN MAX
f
max
150 150 150 150 MHz
t
PLH
CLKBA or
A or B
1.3 4.5 5 1.3 2.8 4.2 4.7
ns
t
PHL
CLKBA or
CLKAB
A or B
1.3 4.5 5 1.3 2.8 4.2 4.7
ns
t
PLH
A or B
B or A
1 3.6 4.1 1 2.4 3.4 3.9
ns
t
PHL
A or B B or A
1 3.6 4.1 1 2.1 3.4 3.9
ns
t
PLH
SBA or SAB
‡
A or B
1 4.7 5.6 1 2.8 4.5 5.4
ns
t
PHL
SBA or SAB
‡
A or B
1 4.7 5.6 1 3 4.5 5.4
ns
t
PZH
OE
A or B
1 4.5 5.4 1 2.5 4.3 5.2
ns
t
PZL
OE
A or B
1 4.5 5.4 1 2.6 4.3 5.2
ns
t
PHZ
OE
A or B
2 5.8 6.3 2 4 5.6 6.1
ns
t
PLZ
OE
A or B
2 5.6 6.3 2 3.6 5.4 6.1
ns
t
PZH
DIR
A or B
1 4.6 5.5 1 3 4.4 5.3
ns
t
PZL
DIR A or B
1 4.6 5.5 1 3 4.4 5.3
ns
t
PHZ
DIR
A or B
1.5 6 7.1 1.5 3.9 5.7 6.8
ns
t
PLZ
DIR A or B
1.5 5.5 6 1.5 3.6 5.2 5.7
ns
†
All typical values are at V
CC
= 3.3 V, T
A
= 25°C.
‡
These parameters are measured with the internal output state of the storage register opposite that of the bus input.
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