Datasheet

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DESCRIPTION/ORDERING INFORMATION (CONTINUED)
DIR
OE
A1
B1
To Seven Other Channels
2
3
22
21
SN74LVCH8T245
8-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES637A – AUGUST 2005 – REVISED FEBRUARY 2007
The SN74LVCH8T245 is designed for asynchronous communication between two data buses. The logic levels
of the direction-control (DIR) input and the output-enable ( OE) input activate either the B-port outputs or the
A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A
bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port
outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or
LOW level applied to prevent excess I
CC
and I
CCZ
.
The SN74LVCH8T245 is designed so that the control pins (DIR and OE) are supplied by V
CCA
.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The V
CC
isolation feature ensures that if either V
CC
input is at GND, then both ports are in the high-impedance
state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(1)
(EACH 8-BIT SECTION)
CONTROL INPUTS OUTPUT CIRCUITS
OPERATION
OE DIR A PORT B PORT
L L Enabled Hi-Z B data to A bus
L H Hi-Z Enabled A data to B bus
H X Hi-Z Hi-Z Isolation
(1) Input circuits of the data I/Os are always active.
LOGIC DIAGRAM (POSITIVE LOGIC)
2
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