Datasheet

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DESCRIPTION/ORDERING INFORMATION (CONTINUED)
SN54LVC646A, SN74LVC646A
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCAS302J JANUARY 1993 REVISED AUGUST 2005
These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked
into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1
illustrates the four fundamental bus-management functions that are performed with the 'LVC646A devices.
Output-enable ( OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode,
data present at the high-impedance port is stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR
determines which bus receives data when OE is low. In the isolation mode ( OE high), A data is stored in one
register and B data can be stored in the other register.
When an output function is disabled, the input function still is enabled and can be used to store and transmit
data. Only one of the two buses, A or B, can be driven at a time.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
INPUTS DATA I/O
OPERATION OR
FUNCTION
OE DIR CLKAB CLKBA SAB SBA A1–A8 B1–B8
X X X X X Input Unspecified
(1)
Store A, B unspecified
(1)
X X X X X Unspecified
(1)
Input Store B, A unspecified
(1)
H X X X Input Input Store and B data
H X H or L H or L X X Input disabled Input disabled Isolation, hold storage
L L X X X L Output Input Real-time B data to A bus
L L X H or L X H Output Input Stored B data to A bus
L H X X L X Input Output Real-time A data to B bus
L H H or L X H X Input Output Stored A data to B bus
(1) The data-output functions can be enabled or disabled by various signals at OE and DIR. Data-input functions always are enabled; i.e.,
data at the bus terminals is stored on every low-to-high transition of the clock inputs.
2