Datasheet

SN54LVC574A, SN74LVC574A
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCAS301R − JANUARY 1993 − REVISED MARCH 2005
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
recommended operating conditions (see Note 7)
SN54LVC574A
−55 TO 125°C
UNIT
MIN MAX
UNIT
V
Operating 2 3.6
V
V
CC
Supply voltage
Data retention only
1.5
V
V
IH
High-level input voltage V
CC
= 2.7 V to 3.6 V 2 V
V
IL
Low-level input voltage V
CC
= 2.7 V to 3.6 V 0.8 V
V
I
Input voltage 0 5.5 V
V
High or low state 0 V
CC
V
V
O
Output voltage
3−state
0 5.5
V
I
V
CC
= 2.7 V −12
mA
I
OH
High-level output current
V
CC
= 3 V −24
mA
I
O
V
CC
= 2.7 V 12
mA
I
OL
Low-level output current
V
CC
= 3 V 24
mA
Δt/Δv Input transition rise or fall rate 6 ns/V
NOTE 7: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
recommended operating conditions (see Note 7)
SN74LVC574A
T
A
= 25°C −40 TO 85°C −40 TO 125°C
UNIT
MIN MAX MIN MAX MIN MAX
UNIT
V
Supply voltage
Operating 1.65 3.6 1.65 3.6 1.65 3.6
V
V
CC
Supply voltage
Data retention only
1.5 1.5 1.5
V
Hi h l l i t
V
CC
= 1.65 V to 1.95 V 0.65 × V
CC
0.65 × V
CC
0.65 × V
CC
V
IH
High-level input
voltage
V
CC
= 2.3 V to 2.7 V 1.7 1.7 1.7
V
V
IH
vo
lt
age
V
CC
= 2.7 V to 3.6 V 2 2 2
V
Lllit
V
CC
= 1.65 V to 1.95 V 0.35 × V
CC
0.35 × V
CC
0.35 × V
CC
V
IL
Low-level input
voltage
V
CC
= 2.3 V to 2.7 V 0.7 0.7 0.7
V
V
IL
vo
lt
age
V
CC
= 2.7 V to 3.6 V 0.8 0.8 0.8
V
V
I
Input voltage 0 5.5 0 5.5 0 5.5 V
V
Output voltage
High or low state 0 V
CC
0 V
CC
0 V
CC
V
V
O
Output voltage
3−state
0 5.5 0 5.5 0 5.5
V
V
CC
= 1.65 V −4 −4 −4
I
Hi
g
h-level
V
CC
= 2.3 V −8 −8 −8
mA
I
OH
High level
output current
V
CC
= 2.7 V −12 −12 −12
mA
V
CC
= 3 V −24 −24 −24
V
CC
= 1.65 V 4 4 4
I
Low-level
V
CC
= 2.3 V 8 8 8
mA
I
OL
Low level
output current
V
CC
= 2.7 V 12 12 12
mA
V
CC
= 3 V 24 24 24
Δt/Δv Input transition rise or fall rate 6 6 6 ns/V
NOTE 7: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.