Datasheet

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Y2
A
INH
Y1
COM
5
2
7
6
1
SW
SW
NOTE A: For simplicity, the test conditions shown in Figures 1 through 4 and 6 through 10 are for the demultiplexer configuration. Signals can
be passed from COM to Y1 (Y2) or from Y1 (Y2) to COM.
COM Y
SN74LVC2G53
SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH
2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER
SCES324M – JULY 2001 – REVISED FEBRUARY 2007
FUNCTION TABLE
CONTROL
ON
INPUTS
CHANNEL
INH A
L L Y1
L H Y2
H X None
LOGIC DIAGRAM (POSITIVE LOGIC)
SIMPLIFIED SCHEMATIC, EACH SWITCH (SW)
2
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