Datasheet

1
2
7
1A
1B
1Y
5
6
3
2A
2B
2Y
SN74LVC2G00
SCES193M –APRIL 1999–REVISED NOVEMBER 2013 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Function Table
(Each Gate)
INPUTS
OUTPUT
Y
A B
H H L
L X H
X L H
Logic Diagram (Positive Logic)
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range –0.5 6.5 V
V
I
Input voltage range
(2)
–0.5 6.5 V
V
O
Voltage range applied to any output in the high-impedance or power-off state
(2)
–0.5 6.5 V
V
O
Voltage range applied to any output in the high or low state
(2) (3)
–0.5 V
CC
+ 0.5 V
I
IK
Input clamp current V
I
< 0 –50 mA
I
OK
Output clamp current V
O
< 0 –50 mA
I
O
Continuous output current ±50 mA
Continuous current through V
CC
or GND ±100 mA
DCT package 220
θ
JA
Package thermal impedance
(4)
DCU package 227 °C/W
YZP package 102
T
stg
Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3) The value of V
CC
is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
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