Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Gate OR gate 74LVC SC 70 6

www.ti.com

FEATURES

Seemechanicaldrawingsfordimensions.

DBVPACKAGE

(TOP VIEW)

DCKPACKAGE

(TOP VIEW)

YEP OR YZP PACKAGE

(BOTTOMVIEW)

GND

DESCRIPTION/ORDERING INFORMATION

The SN74LVC1G332 performs the Boolean function in

Y + A ) B ) C or Y + A • B • C

positive logic.

SN74LVC1G332

SINGLE 3-INPUT POSITIVE-OR GATE

SCES489D – SEPTEMBER 2003 – REVISED SEPTEMBER 2006

• Available in the Texas Instruments • Latch-Up Performance Exceeds 100 mA Per

NanoStar™ and NanoFree™ Packages JESD 78, Class II

• Supports 5-V V

Operation • ESD Protection Exceeds JESD 22

• Inputs Accept Voltages to 5.5 V – 2000-V Human-Body Model (A114-A)

• Max t

of 4.5 ns at 3.3 V – 200-V Machine Model (A115-A)

• Low Power Consumption, 10- µ A Max I

– 1000-V Charged-Device Model (C101)

• ± 24-mA Output Drive at 3.3 V

• I

off

Supports Partial-Power-Down Mode

Operation

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

This device is fully specified for partial-power-down applications using I

off

. The I

off

circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

PACKAGE

(1)

ORDERABLE PART NUMBER TOP-SIDE MARKING

(2)

NanoStar™ – WCSP (DSBGA)

SN74LVC1G332YEPR

0.23-mm Large Bump – YEP

Reel of 3000 _ _ _CZ_

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP SN74LVC1G332YZPR

(Pb-free)

–40 ° C to 85 ° C

Reel of 3000 SN74LVC1G332DBVR

SOT (SOT-23) – DBV C2C_

Reel of 250 SN74LVC1G332DBVT

Reel of 3000 SN74LVC1G332DCKR

SOT (SC-70) – DCK CZ_

Reel of 250 SN74LVC1G332DCKT

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition

(1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (22 pages)

PAGE 1
SN74LVC1G332 SINGLE 3-INPUT POSITIVE-OR GATE www.ti.com SCES489D – SEPTEMBER 2003 – REVISED SEPTEMBER 2006 FEATURES • • • • • • • • Available in the Texas Instruments NanoStar™ and NanoFree™ Packages Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 4.5 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.
PAGE 2
SN74LVC1G332 SINGLE 3-INPUT POSITIVE-OR GATE www.ti.com SCES489D – SEPTEMBER 2003 – REVISED SEPTEMBER 2006 FUNCTION TABLE INPUTS B C OUTPUT Y H X X H X H X H X X H H L L L L A LOGIC DIAGRAM (POSITIVE LOGIC) A B C Y Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V –0.5 6.5 V –0.5 VCC + 0.
PAGE 3
SN74LVC1G332 SINGLE 3-INPUT POSITIVE-OR GATE www.ti.com SCES489D – SEPTEMBER 2003 – REVISED SEPTEMBER 2006 Recommended Operating Conditions VCC Supply voltage (1) Operating Data retention only VCC = 1.65 V to 1.95 V VIH High-level input voltage VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V MIN MAX 1.65 5.5 1.5 Low-level input voltage V 0.65 × VCC 1.7 V 2 0.7 × VCC 0.35 × VCC VCC = 1.65 V to 1.95 V VIL UNIT VCC = 2.3 V to 2.7 V 0.7 VCC = 3 V to 3.6 V 0.8 V 0.
PAGE 4
SN74LVC1G332 SINGLE 3-INPUT POSITIVE-OR GATE www.ti.com SCES489D – SEPTEMBER 2003 – REVISED SEPTEMBER 2006 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –100 µA VOH 1.65 V to 5.5 V 1.65 V 1.2 IOH = –8 mA 2.3 V 1.9 4.5 V IOL = 100 µA 1.65 V to 5.5 V 0.1 IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.3 IOL = 32 mA 0.4 ICC VI = 5.5 V or GND, IO = 0 ∆ICC One input at VCC – 0.
PAGE 5
SN74LVC1G332 SINGLE 3-INPUT POSITIVE-OR GATE www.ti.com SCES489D – SEPTEMBER 2003 – REVISED SEPTEMBER 2006 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test Open TEST GND CL (see Note A) S1 Open VLOAD tPLH/tPHL tPLZ/tPZL tPHZ/tPZH RL GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC £2 ns £2 ns £2.5 ns £2.5 ns VM VLOAD CL RL VD VCC/2 VCC/2 1.
PAGE 6
SN74LVC1G332 SINGLE 3-INPUT POSITIVE-OR GATE www.ti.com SCES489D – SEPTEMBER 2003 – REVISED SEPTEMBER 2006 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test Open TEST GND CL (see Note A) S1 Open VLOAD tPLH/tPHL tPLZ/tPZL tPHZ/tPZH RL GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC £2 ns £2 ns £2.5 ns £2.5 ns VM VLOAD CL RL VD VCC/2 VCC/2 1.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 29-Jun-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ SN74LVC1G332DBVR SOT-23 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DBV 6 3000 180.0 9.2 3.17 3.23 1.37 4.0 8.0 Q3 SN74LVC1G332DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 SN74LVC1G332DCKR SC70 DCK 6 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 29-Jun-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC1G332DBVR SOT-23 DBV 6 3000 205.0 200.0 33.0 SN74LVC1G332DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 SN74LVC1G332DCKR SC70 DCK 6 3000 180.0 180.0 18.0 SN74LVC1G332DCKR SC70 DCK 6 3000 205.0 200.0 33.0 SN74LVC1G332DRLR SOT DRL 6 4000 202.0 201.0 28.0 SN74LVC1G332DRLR SOT DRL 6 4000 180.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.