Datasheet

www.ti.com
FEATURES
DBV OR DCK PACKAGE
(TOP VIEW)
1
2
3
5
4
A
B
GND
V
CC
Y
DESCRIPTION/ORDERING INFORMATION
The SN74LVC1G32 performs the Boolean function
Y + A ) B or Y + A • B
in positive logic.
SN74LVC1G32-EP
SINGLE 2-INPUT POSITIVE-OR GATE
SCES458D – DECEMBER 2003 – REVISED JUNE 2007
• Controlled Baseline • I
off
Supports Partial Power Down Mode
Operation
– One Assembly/Test Site, One Fabrication
Site • Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• Extended Temperature Performance of –55 ° C
to 125 ° C • ESD Protection Exceeds JESD 22
• Enhanced Diminishing Manufacturing Sources – 2000-V Human-Body Model (A114-A)
(DMS) Support
– 200-V Machine Model (A115-A)
• Enhanced Product-Change Notification
– 1000-V Charged-Device Model (C101)
• Qualification Pedigree
(1)
• Supports 5-V V
CC
Operation
• Inputs Accept Voltages to 5.5 V
• Max t
pd
of 3.6 ns at 3.3 V
• Low Power Consumption, 10 μ A Max I
CC
• ± 24-mA Output Drive at 3.3 V
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
This single 2-input positive-OR gate is designed for 1.65-V to 5.5-V V
CC
operation.
This device is fully specified for partial power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
(1)
T
A
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
(3)
–40 ° C to 85 ° C SOT (SC-70) – DCK Reel of 3000 SN74LVC1G32IDCKREP CG0
SOT (SC-70) – DCK Reel of 3000 SN74LVC1G32MDCKREP BYB
–55 ° C to 125 ° C
SOP (SOT-23) – DBV Reel of 3000 SN74LVC1G32MDBVREP SBGM
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(3) The actual top-side making has one additional character that designates the wafer fab/assembly site.
FUNCTION TABLE
INPUTS
OUTPUT
Y
A B
H X H
X H H
L L L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.