Datasheet

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A
B
Y
1
2
4
SN74LVC1G02-EP
SINGLE 2-INPUT POSITIVE-NOR GATE
SGLS370 – AUGUST 2006
ORDERING INFORMATION
TOP-SIDE
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER
MARKING
(2)
NanoStar™ – WCSP (DSBGA)
SN74LVC1G02NYEAREP
(3)
0,17-mm Small Bump – YEA
NanoFree™ – WCSP (DSBGA)
SN74LVC1G02NYZAREP
(3)
0,17-mm Small Bump – YZA (Pb-free)
Reel of 3000 _ _ _CB_
NanoStar™ – WCSP (DSBGA)
SN74LVC1G02MYEPREP
(3)
0,23-mm Large Bump – YEP
–55 ° C to 125 ° C
NanoFree™ – WCSP (DSBGA)
SN74LVC1G02MYZPREP
(3)
0,23-mm Large Bump – YZP (Pb-free)
SOT (SOT-23) – DBV Reel of 3000 SN74LVC1G02MDBVREP
(3)
C02_
SOT (SC-70) – DCK Reel of 3000 SN74LVC1G02MDCKREP BUF
SOT (SOT-553) – DRL Reel of 4000 SN74LVC1G02MDRLREP
(3)
CB_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition(1 = SnPb, • = Pb-free).
(3) Product Preview
FUNCTION TABLE
INPUTS
OUTPUT
Y
A B
H X L
X H L
L L H
LOGIC DIAGRAM (POSITIVE LOGIC)
2
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