SN54LV595A, SN74LV595A
8-BIT SHIFT REGISTERS
WITH 3-STATE OUTPUT REGISTERS
SCLS414O − APRIL 1998 − REVISED JANUARY 2011
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing diagram
SRCLK
SER
RCLK
SRCLR
OE
Q
A
Q
B
Q
C
Q
D
Q
E
Q
F
Q
G
Q
H
Q
H
′
implies that the output is in 3-State mode.NOTE:
