Datasheet

SN54LV595A, SN74LV595A
8-BIT SHIFT REGISTERS
WITH 3-STATE OUTPUT REGISTERS
SCLS414O − APRIL 1998 − REVISED JANUARY 2011
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
3D
C3
1D
C1
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
13
12
10
11
14
15
1
2
3
4
5
6
7
9
Q
A
Q
B
Q
C
Q
D
Q
E
Q
F
Q
G
Q
H
Q
H
′
OE
SRCLR
RCLK
SRCLK
SER
Pin numbers shown are for the D, DB, J, NS, PW, RGY, and W packages.
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q