Datasheet

SN54LV4066A, SN74LV4066A
QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427I − APRIL 1999 − REVISED APRIL 2005
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 5)
SN54LV4066A SN74LV4066A
UNIT
MIN MAX MIN MAX
UNIT
V
CC
Supply voltage 2
†
5.5 2
†
5.5 V
V
CC
= 2 V 1.5 1.5
V
High level input voltage control inputs
V
CC
= 2.3 V to 2.7 V V
CC
× 0.7 V
CC
× 0.7
V
V
IH
High-level input voltage, control inputs
V
CC
= 3 V to 3.6 V V
CC
× 0.7 V
CC
× 0.7
V
V
CC
= 4.5 V to 5.5 V V
CC
× 0.7 V
CC
× 0.7
V
CC
= 2 V 0.5 0.5
V
Low level input voltage control inputs
V
CC
= 2.3 V to 2.7 V V
CC
× 0.3 V
CC
× 0.3
V
V
IL
Low-level input voltage, control inputs
V
CC
= 3 V to 3.6 V V
CC
× 0.3 V
CC
× 0.3
V
V
CC
= 4.5 V to 5.5 V V
CC
× 0.3 V
CC
× 0.3
V
I
Control input voltage 0 5.5 0 5.5 V
V
IO
Input/output voltage 0 V
CC
0 V
CC
V
V
CC
= 2.3 V to 2.7 V 200 200
Δt/Δv Input transition rise or fall rate
V
CC
= 3 V to 3.6 V 100 100
ns/V
Δt/Δv
Input
transition
rise
or
fall
rate
V
CC
= 4.5 V to 5.5 V 20 20
ns/V
T
A
Operating free-air temperature −55 125 −40 85 °C
†
With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. Only digital signals should be transmitted
at these low supply voltages.
NOTE 5: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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