Datasheet
1
2 18
1Y1
1OE
1A1
4 16
1Y2
1A2
6 14
1Y3
1A3
8 12
1Y4
1A4
19
11 9
2Y1
2OE
2A1
13 7
2Y2
2A2
15 5
2Y3
2A3
17 3
2Y4
2A4
SN54LV244A
SN74LV244A
SCLS383M –SEPTEMBER 1997–REVISED JULY 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
FUNCTION TABLE
(EACH BUFFER)
INPUTS OUTPUT
OE A Y
L H H
L L L
H X Z
LOGIC DIAGRAM (POSITIVE LOGIC)
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range –0.5 7 V
V
I
Input voltage range
(2)
–0.5 7 V
V
O
Voltage range applied to any output in the high-impedance or power-off state
(2)
–0.5 7 V
V
O
Output voltage range
(2)(3)
–0.5 V
CC
+ 0.5 V
I
IK
Input clamp current V
I
< 0 –20 mA
I
OK
Output clamp current V
O
< 0 –50 mA
I
O
Continuous output current V
O
= 0 to V
CC
±35 mA
Continuous current through V
CC
or GND ±70 mA
D package
(4)
70
DGV package
(4)
92
DW package
(4)
58
θ
JA
Package thermal impedance °C/W
NS package
(4)
60
PW package
(4)
83
RGY package
(5)
37
T
stg
Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) This value is limited to 5.5 V maximum.
(4) The package thermal impedance is calculated in accordance with JESD 51-7
(5) The package thermal impedance is calculated in accordance with JESD 51-5.
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