Datasheet

 
  
  
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 4)
SN54LV221A SN74LV221A
UNIT
MIN MAX MIN MAX
UNIT
V
CC
Supply voltage 2 5.5 2 5.5 V
V
CC
= 2 V 1.5 1.5
V
IH
High-level input voltage
V
CC
= 2.3 V to 2.7 V V
CC
× 0.7 V
CC
× 0.7
V
V
IH
High-level input voltage
V
CC
= 3 V to 3.6 V
V
CC
× 0.7 V
CC
× 0.7
V
V
CC
= 4.5 V to 5.5 V V
CC
× 0.7 V
CC
× 0.7
V
CC
= 2 V 0.5 0.5
V
IL
Low-level input voltage
V
CC
= 2.3 V to 2.7 V V
CC
× 0.3 V
CC
× 0.3
V
V
IL
Low-level input voltage
V
CC
= 3 V to 3.6 V
V
CC
× 0.3 V
CC
× 0.3
V
V
CC
= 4.5 V to 5.5 V V
CC
× 0.3 V
CC
× 0.3
V
I
Input voltage 0 5.5 0 5.5 V
V
O
Output voltage 0 V
CC
0 V
CC
V
V
CC
= 2 V −50 −50 µA
I
OH
High-level output current
V
CC
= 2.3 V to 2.7 V −2 −2
I
OH
High-level output current
V
CC
= 3 V to 3.6 V
−6 −6
mA
V
CC
= 4.5 V to 5.5 V −12 −12
mA
V
CC
= 2 V 50 50 µA
I
OL
Low-level output current
V
CC
= 2.3 V to 2.7 V 2 2
I
OL
Low-level output current
V
CC
= 3 V to 3.6 V
6 6
mA
V
CC
= 4.5 V to 5.5 V 12 12
mA
R
ext
External timing resistance
V
CC
= 2 V 5k 5k
Ω
R
ext
External timing resistance
V
CC
≥ 3 V
1k 1k
Ω
C
ext
External timing capacitance No restriction No restriction pF
∆t/∆V
CC
Power-up ramp rate 1 1 ms/V
T
A
Operating free-air temperature −55 125 −40 85 °C
NOTE 4: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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