Datasheet

50% V
CC
V
CC
V
CC
0 V
0 V
t
h
t
su
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Data Input
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
V
CC
0 V
50% V
CC
50% V
CC
Input
Out-of-Phase
Output
In-Phase
Output
Timing Input
50% V
CC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Control
Output
Waveform 1
S1 at V
CC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
≈V
CC
0 V
50% V
CC
V
OL
+ 0.3 V
50% V
CC
≈0 V
V
CC
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open Drain
Open
V
CC
GND
V
CC
TEST S1
V
CC
0 V
50% V
CC
t
w
VOLTAGE WAVEFORMS
PULSE DURATION
Input
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z
O
= 50 Ω, t
r
≤ 3 ns, t
f
≤ 3 ns.
D. The outputs are measured one at a time, with one input transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as t
en
.
G. t
PHL
and t
PLH
are the same as t
pd
.
H. All parameters and waveforms are not applicable to all devices.
From Output
Under Test
C
L
(see Note A)
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
S1
V
CC
R
L
= 1 kΩ
GND
From Output
Under Test
C
L
(see Note A)
Test
Point
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Open
50% V
CC
50% V
CC
50% V
CC
50% V
CC
50% V
CC
50% V
CC
50% V
CC
50% V
CC
V
OH
0.3 V
SN54LV132A, SN74LV132A
SCLS394I –APRIL 1999–REVISED JUNE 2010 www.ti.com
PARAMETER MEASUREMENT INFORMATION
Figure 1. Load Circuit and Voltage Waveforms
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Product Folder Link(s): SN54LV132A SN74LV132A