Datasheet
(see Note B)
V
CC
R
L
From Output
Under Test
C
L
(see Note A)
Test
Point
1 kΩ
S1
S2
t
PHL
t
PLH
t
PLH
t
PHL
Input
Out-of-Phase
Output
(see Note D)
3 V
0 V
V
OL
V
OH
V
OH
V
OL
In-Phase
Output
(see Note D)
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
V
CC
R
L
Test
Point
From Output
Under Test
C
L
(see Note A)
3 V
3 V
0 V
0 V
t
t
h
su
Timing
Input
Data
Input
1.5 V
1.5 V 1.5 V
(see Note B)
V
CC
R
L
From Output
Under Test
C
L
(see Note A)
Test
Point
High-Level
Pulse
Low-Level
Pulse
1.5 V 1.5 V
1.5 V 1.5 V
t
w
9
SN54LS240
,
SN54LS241
,
SN54LS244
,
SN54S240
,
SN54S241
,
SN54S244
SN74LS240
,
SN74LS241
,
SN74LS244
,
SN74S240
,
SN74S241
,
SN74S244
www.ti.com
SDLS144D –APRIL 1985–REVISED OCTOBER 2016
Product Folder Links: SN54LS240 SN54LS241 SN54LS244 SN54S240 SN54S241 SN54S244 SN74LS240
SN74LS241 SN74LS244 SN74S240 SN74S241 SN74S244
Submit Documentation FeedbackCopyright © 1985–2016, Texas Instruments Incorporated
7.2 SN54S24x and SN74S24x Devices
Figure 9. Load Circuit,
For 2-State Totem-Pole Outputs
Figure 10. Load Circuit,
For Open-Collector Outputs
Figure 11. Load Circuit,
For 3-State Outputs
Figure 12. Voltage Waveforms,
Pulse Durations
Figure 13. Voltage Waveforms,
Setup and Hold Times
Figure 14. Voltage Waveforms,
Propagation Delay Times