Datasheet

Control or Microprogram ROM/PROM
or
Memory Address Register
'Ls240/
'S240
System and/or Memory-Address Bus
Output
Control
Copyright © 2016, Texas Instruments Incorporated
I
OL
(mA)
V
OL
(max) V
0
3 6 9 12 15 18 21 24 27
0.1
0.2
0.3
0.4
0.5
V
CC
@ 4.75 V
15
SN54LS240 , SN54LS241 , SN54LS244 , SN54S240 , SN54S241 , SN54S244
SN74LS240 , SN74LS241 , SN74LS244 , SN74S240 , SN74S241 , SN74S244
www.ti.com SDLS144D –APRIL 1985–REVISED OCTOBER 2016
Product Folder Links: SN54LS240 SN54LS241 SN54LS244 SN54S240 SN54S241 SN54S244 SN74LS240
SN74LS241 SN74LS244 SN74S240 SN74S241 SN74S244
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Typical Application (continued)
9.2.3 Application Curve
Figure 23. V
OL
vs I
OL
9.3 System Examples
The SNx4LS240 and SNx4S240 devices can be used to buffer signals along a memory bus. The increased
output drive helps data transmission reliability. Figure 24 shows a schematic of this example.
4-bit organization can be applied to handle binary or BCD
Figure 24. SNx4LS240 and SNx4S240 Used as System or Memory Bus Driver
The SNx4LS240 and SNx4S240 devices have two independently controlled 4-bit drivers, and can be used to
buffer signals in a bidirectional manner along a data bus. Figure 25 shows the SNx4LS240 or SNx4S240 used in
this manner.