Datasheet

41A2
52Y3
61A3
72Y2
81A4
92Y1 10GND 112A1 121Y4 132A2
14 1Y3
15 2A3
16 1Y2
17 2A4
18 1Y1
19 2G/2G 20 V
CC
1 1G 2 1A1 3 2Y4
Not to scale
11G 20 V
CC
21A1 19 2G/2G
32Y4 18 1Y1
41A2 17 2A4
52Y3 16 1Y2
61A3 15 2A3
72Y2 14 1Y3
81A4 13 2A2
92Y1 12 1Y4
10GND 11 2A1
Not to scale
3
SN54LS240 , SN54LS241 , SN54LS244 , SN54S240 , SN54S241 , SN54S244
SN74LS240 , SN74LS241 , SN74LS244 , SN74S240 , SN74S241 , SN74S244
www.ti.com SDLS144D –APRIL 1985–REVISED OCTOBER 2016
Product Folder Links: SN54LS240 SN54LS241 SN54LS244 SN54S240 SN54S241 SN54S244 SN74LS240
SN74LS241 SN74LS244 SN74S240 SN74S241 SN74S244
Submit Documentation FeedbackCopyright © 1985–2016, Texas Instruments Incorporated
5 Pin Configuration and Functions
DB, DW, J, N, NS, or W Package
20-Pin SSOP, SOIC, CDIP, PDIP, SOP, or CFP
Top View
FK Package
20-Pin LCCC
Top View
(1) 2G for SNx4LS241 and SNx4S241 or 2G for all other drivers.
Pin Functions
PIN
I/O DESCRIPTION
NO. NAME
1 1G I Channel 1 output enable
2 1A1 I Channel 1, A side 1
3 2Y4 O Channel 2, Y side 4
4 1A2 I Channel 1, A side 2
5 2Y3 O Channel 2, Y side 3
6 1A3 I Channel 1, A side 3
7 2Y2 O Channel 2, Y side 2
8 1A4 I Channel 1, A side 4
9 2Y1 O Channel 2, Y side 1
10 GND — Ground
11 2A1 I Channel 2, A side 1
12 1Y4 O Channel 1, Y side 4
13 2A2 I Channel 2, A side 2
14 1Y3 O Channel 1, Y side 3
15 2A3 I Channel 2, A side 3
16 1Y2 O Channel 1, Y side 2
17 2A4 I Channel 2, A side 4
18 1Y1 O Channel 1, Y side 1
19 2G/2G
(1)
I Channel 2 output enable
20 V
CC
— Power supply