Datasheet

SN54165, SN54LS165A, SN74165, SN74LS165A
PARALLEL-LOAD 8-BIT SHIFT REGISTERS
SDLS062D – OCTOBER 1976 – REVISED FEBRUARY 2002
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
1
15
2
10
SH/LD
CLK INH
CLK
SER
9
7
Q
H
Q
H
11 12 13 14 3 4 5 6
ABCDEF
G
H
Pin numbers shown are for D, J, N, NS, and W packages.
Q
A
Q
B
Q
C
Q
D
Q
E
Q
F
Q
G
typical shift, load, and inhibit sequences
Serial ShiftInhibit
Load
E
Output Q
H
H
G
C
F
Data
Inputs
D
SH/LD
SER
CLK INH
CLK
B
A
Output Q
H
L
L
H
L
H
L
H
H
H
H
L
H
L
H
L
H
L
H
L
L
H
L
H
L
H
The SN54165 and SN74165 devices
are obsolete and are no longer supplied
.