Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Decoder Priority encoder Single supply SOIC 16 N

   

    

        

SDLS053B − OCTOBER 1976 − REVISED MAY 2004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

’147, ’LS147

D Encode 10-Line Decimal to 4-Line BCD

D Applications Include:

− Keyboard Encoding

− Range Selection

’148, ’LS148

D Encode 8 Data Lines to 3-Line Binary

(Octal)

D Applications Include:

− n-Bit Encoding

− Code Converters and Generators

3212019

910111213

GND

SN54LS147 ...FK PACKAGE

(TOP VIEW)

NC − No internal connection

GND

SN54147, SN54LS147 ...J OR W PACKAGE

SN74147, SN74LS147 ...D OR N PACKAGE

(TOP VIEW)

GND

SN54148, SN54LS148 ...J OR W PACKAGE

SN74148, SN74LS148 . . . D, N, OR NS PACKAGE

(TOP VIEW)

3212019

910111213

GND

SN54LS148 . . . FK PACKAGE

(TOP VIEW)

TYPE

TYPICAL

DATA

DELAY

TYPICAL

POWER

DISSIPATION

’147 10 ns 225 mW

’148 10 ns 190 mW

’LS147 15 ns 60 mW

’LS148 15 ns 60 mW

NOTE: The SN54147, SN54LS147, SN54148, SN74147, SN74LS147, and SN74148 are obsolete and are no longer supplied.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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Summary of content (26 pages)

PAGE 1
SDLS053B − OCTOBER 1976 − REVISED MAY 2004 D D ’147, ’LS147 Encode 10-Line Decimal to 4-Line BCD Applications Include: − Keyboard Encoding − Range Selection D D SN54147, SN54LS147 . . . J OR W PACKAGE SN74147, SN74LS147 . . .
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SDLS053B − OCTOBER 1976 − REVISED MAY 2004 description/ordering information These TTL encoders feature priority decoding of the inputs to ensure that only the highest-order data line is encoded. The ’147 and ’LS147 devices encode nine data lines to four-line (8-4-2-1) BCD.
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SDLS053B − OCTOBER 1976 − REVISED MAY 2004 FUNCTION TABLE − ’148, ’LS148 OUTPUTS INPUTS EI 0 1 2 3 4 5 6 7 A2 A1 A0 GS EO H X X X X X X X X H H H H H L H H H H H H H H H H H H L L X X X X X X X L L L L L H L X X X X X X L H L L H L H L X X X X X L H H L H L L H L X X X X L H H H L
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SDLS053B − OCTOBER 1976 − REVISED MAY 2004 ’147, ’LS147 logic diagram (positive logic) (11) 1 2 3 4 (12) (9) (13) (1) (7) 5 6 7 8 9 B (2) (3) (4) (6) C (5) (14) (10) Pin numbers shown are for D, J, N, and W packages.
PAGE 5
SDLS053B − OCTOBER 1976 − REVISED MAY 2004 ’148, ’LS148 logic diagram (positive logic) 0 (10) (15) 1 2 (14) (11) 4 6 7 EI A0 (13) (1) (7) 5 G5 (12) (9) 3 EO A1 (2) (3) (4) (6) A2 (5) Pin numbers shown are for D, J, N, NS, and W packages.
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SDLS053B − OCTOBER 1976 − REVISED MAY 2004 schematics of inputs and outputs ’147, ’148 EQUIVALENT OF EACH INPUT TYPICAL OF ALL OUTPUTS VCC VCC Ω NOM Req Input Output 0 input (’148): Req = 2 kΩ NOM All other inputs: Req = 4 kΩ NOM ’LS147, ’LS148 EQUIVALENT OF ALL INPUTS TYPICAL OF ALL OUTPUTS VCC VCC 120 Ω NOM Req Input Output ’LS148 inputs 1–7: Req = 9 kΩ NOM
PAGE 7
SDLS053B − OCTOBER 1976 − REVISED MAY 2004 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: ’147, ’148 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 8
SDLS053B − OCTOBER 1976 − REVISED MAY 2004 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS† PARAMETER VIH VIL High-level input voltage VIK Input clamp voltage VOH High-level output voltage VOL ’147 MIN TYP‡ MAX ’148 MIN TYP‡ 2 2 Low-level input voltage V 0.8 V −1.5 −1.
PAGE 9
SDLS053B − OCTOBER 1976 − REVISED MAY 2004 SN54148, SN74148 switching characteristics, VCC = 5 V, TA = 255C (see Figure 1) PARAMETER† FROM (INPUT) TO (OUTPUT) tPLH tPHL 1–7 A0, A1, or A2 In-phase output tPLH tPHL 1–7 A0, A1, or A2 Out-of-phase output tPLH tPHL 0–7 EO Out-of-phase output tPLH tPHL 0–7 GS In-phase output tPLH tPHL EI A0, A1, or A2 In-phas
PAGE 10
SDLS053B − OCTOBER 1976 − REVISED MAY 2004 SN54LS147, SN74LS147 switching characteristics, VCC = 5 V, TA = 255C (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL Any Any tPLH tPHL Any Any WAVEFORM TEST CONDITIONS MIN In-phase output Out-of-phase output CL = 15 pF, RL = 2 kkΩ TYP MAX 12 18 12 18 21 33 15 23 UNIT ns ns SN54LS148, SN74LS148 s
PAGE 11
SDLS053B − OCTOBER 1976 − REVISED MAY 2004 PARAMETER MEASUREMENT INFORMATION SERIES 54/74 DEVICES VCC Test Point VCC RL (see Note B) From Output Under Test CL (see Note A) High-Level Pulse 1.5 V S2 LOAD CIRCUIT FOR 3-STATE OUTPUTS 3V Timing Input 1.
PAGE 12
SDLS053B − OCTOBER 1976 − REVISED MAY 2004 PARAMETER MEASUREMENT INFORMATION SERIES 54LS/74LS DEVICES VCC Test Point VCC RL (see Note B) From Output Under Test CL (see Note A) High-Level Pulse 1.3 V S2 LOAD CIRCUIT FOR 3-STATE OUTPUTS 3V Timing Input 1.
PAGE 13
SDLS053B − OCTOBER 1976 − REVISED MAY 2004 APPLICATION INFORMATION 16-Line Data (active low) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 EI 0 1 2 3 4 5 6 7 EI ’148/’LS148 ’148/LS148 EO A0 A1 A2 GS EO A0 A1 A2 Enable (active low) GS ’08/’LS08 0 1 2 Priority Flag (active low) 3 Encoded Data (active low) 16-Line Data (active low) 0 1 2 3 4 5 6 7
PAGE 14
PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PAGE 17
PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74LS148DR Package Package Pins Type Drawing SOIC D 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 10.3 2.1 8.0 W Pin1 (mm) Quadrant 16.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LS148DR SOIC D 16 2500 333.2 345.9 28.
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