Datasheet

SNx4HCT245
DIR OE
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
Slave DeviceMaster Device
10 k 10 k 10 k 10 k
12
SN54HCT245 , SN74HCT245
SCLS020F –MARCH 1984–REVISED AUGUST 2016 www.ti.com
Product Folder Links: SN54HCT245 SN74HCT245
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10 Power Supply Recommendations
The power supply can be any voltage between the MIN and MAX supply voltage rating located in the
Recommended Operating Conditions. Each V
CC
pin must have a good bypass capacitor to prevent power
disturbance. For devices with a single supply, 0.1 µF is recommended; if there are multiple VCC pins, then 0.01
µF or 0.022 µF is recommended for each power pin. It is acceptable to parallel multiple bypass capacitors to
reject different frequencies of noise. A 0.1 µF and a 1 µF are commonly used in parallel. The bypass capacitor
should be installed as close to the power pin as possible for best results.
11 Layout
11.1 Layout Guidelines
When using multiple-bit logic devices, inputs should never float.
In many cases, functions or parts of functions of digital logic devices are unused, for example, when only six
channels of an eight channel transceiver are used. Such input pins should not be left unconnected because the
undefined voltages at the outside connections result in undefined operational states. All unused inputs of digital
logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should
be applied to any particular unused input depends on the function of the device. Generally they are tied to GND
or V
CC
, whichever makes more sense or is more convenient.
The output enable pin disables the output section of the part when asserted. This does not disable the input
section of the IOs, so they cannot float when disabled.
Figure 6 shows the proper method to terminate unused channels using a large resistance (in this example, 10-kΩ
resistors). This avoids overloading the outputs , and maintains a valid voltage on the inputs. Note that it is also
valid to tie both sides of an unused transceiver directly to ground or V
CC
; however, the two sides must never be
tied to different states directly.
11.2 Layout Example
Figure 6. Proper Termination of OE Pin And Unused Channels 7 and 8