Datasheet

SN54HCT244, SN74HCT244
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS175D – MARCH 1984 – REVISED AUGUST 2003
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
1.3 V
10%
90%
3 V
≈V
CC
V
OL
0 V
Output
Control
(Low-Level
Enabling)
Output
Waveform 1
(See Note B)
1.3 V
t
PZL
t
PLZ
V
OH
≈0 V
1.3 V
1.3 V
t
PZH
t
PHZ
Output
Waveform 2
(See Note B)
From Output
Under Test
R
L
V
CC
S1
S2
LOAD CIRCUIT
PARAMETER C
L
t
PZH
t
pd
or t
t
t
dis
t
en
t
PZL
t
PHZ
t
PLZ
1 kΩ
1 kΩ
50 pF
or
150 pF
50 pF
Open Closed
R
L
S1
Closed Open
S2
Open Closed
Closed Open
50 pF
or
150 pF
Open Open––
NOTES: A. C
L
includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z
O
= 50 Ω, t
r
= 6 ns, t
f
= 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as t
en
.
G. t
PLH
and t
PHL
are the same as t
pd
.
C
L
(see Note A)
Test
Point
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
1.3 V1.3 V
0.3 V0.3 V
2.7 V 2.7 V
3 V
0 V
t
r
t
f
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES
1.3 V
1.3 V1.3 V
10%10%
90% 90%
3 V
V
OH
V
OL
0 V
t
r
t
f
Input
In-Phase
Output
1.3 V
t
PLH
t
PHL
1.3 V 1.3 V
10% 10%
90%90%
V
OH
V
OL
t
r
t
f
t
PHL
t
PLH
Out-of-
Phase
Output
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
Figure 1. Load Circuit and Voltage Waveforms