Datasheet


  
   
SCLS542B − SEPTEMBER 2003 − REVISED JANUARY 2004
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Figure 13. Propagation Delays,
Enable to Analog Out
Enable
Analog
Out
Analog
Out
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
GND
10%
90%
V
CC
High
Impedance
50 %
50 %
t
f
t
f
90%
50%
10%
High
Impedance
Figure 14. Propagation-Delay Test Setup,
Enable to Analog Out
6
8
ON/OFF
Analog I/O
V
CC
V
CC
16
Enable
1
2
1
2
C
L
Test
Point
10 kΩ
Position 1 when testing t
PHZ
and t
PZH
Position 2 when testing t
PLZ
and t
PZL
Figure 15. Power-Dissipation Capacitance Test Setup
Common O/I
6
8
ON/OFF
OFF/ON
V
CC
V
CC
16
Analog I/O
NC
Channel Select
A
11
V
CC