Datasheet
SCLS224B − DECEMBER 1982 − REVISED SEPTEMBER 2003
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued)
These devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized
systems. The 3-state outputs do not load the data lines when the output-enable (G
) input is at a high logic level.
To ensure the high-impedance state during power up or power down, G should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
INPUTS
OUTPUT Y
G
A/B A B
’HC257 ’HC258
H X X X Z Z
L LLX L H
L LHX H L
L HXL L H
L H X H H L
’HC257 logic diagram (positive logic)
4Y
3Y
2Y
1Y
A
/B
G
4B
4A
3B
3A
2B
2A
1B
1A
4
2
3
7
5
6
9
11
10
12
14
13
1
15
Pin numbers shown are for the D, J, N, NS, and PW packages.