Datasheet
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
S
1D
R
C1
1
15
2
10
SH/LD
CLK INH
CLK
SER
9
7
Q
Q
H
H
11 12 13 14 3
4 5 6
A B C D E F G H
Pin numbers shown are for theD, DB, J, N, NS, PW, and W packages.
SN54HC165, SN74HC165
SCLS116G –DECEMBER 1982–REVISED AUGUST 2013
www.ti.com
FUNCTION TABLE
INPUTS
FUNCTION
SH/LD CLK CLK INH
L X X Parallel load
H H X No change
H X H No change
H L ↑ Shift
(1)
H ↑ L Shift
(1)
(1) Shift = content of each internal register shifts toward serial output
Q
H
. Data at SER is shifted into the first register.
LOGIC DIAGRAM (POSITIVE LOGIC)
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