Datasheet
SN74GTLP1394
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY
SCES286E – OCTOBER 1999 – REVISED AUGUST 2001
3–21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D TI-OPC Circuitry Limits Ringing on
Unevenly Loaded Backplanes
D OEC Circuitry Improves Signal Integrity
and Reduces Electromagnetic Interference
D Bidirectional Interface Between GTLP
Signal Levels and LVTTL Logic Levels
D Split LVTTL Port Provides a Feedback Path
for Control and Diagnostics Monitoring
D LVTTL Interfaces Are 5-V Tolerant
D High-Drive GTLP Outputs (100 mA)
D LVTTL Outputs (–24 mA/24 mA)
D Variable Edge-Rate Control (ERC) Input
Selects GTLP Rise and Fall Times for
Optimal Data-Transfer Rate and Signal
Integrity in Distributed Loads
D I
off
, Power-Up 3-State, and BIAS V
CC
Support Live Insertion
D Polarity Control Selects True or
Complementary Outputs
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
description
The SN74GTLP1394 is a high-drive, 2-bit, 3-wire bus transceiver that provides LVTTL-to-GTLP and
GTLP-to-LVTTL signal-level translation. It allows for transparent and inverted transparent modes of data
transfer with separate LVTTL input and LVTTL output pins, which provides a feedback path for control and
diagnostics monitoring. The device provides a high-speed interface between cards operating at LVTTL logic
levels and a backplane operating at GTLP signal levels, and is especially designed to work with the
Texas Instruments 1394 backplane physical-layer controllers. High-speed (about three times faster than
standard LVTTL or TTL) backplane operation is a direct result of GTLP reduced output swing (<1 V), reduced
input threshold levels, improved differential input, OECcircuitry, and TI-OPC
circuitry. Improved GTLP OEC
and TI-OPC circuitry minimizes bus-settling time and have been designed and tested using several backplane
models. The high drive allows incident-wave switching in heavily loaded backplanes with equivalent load
impedance down to 11 Ω.
GTLP is the Texas Instruments (TI) derivative of the Gunning Transceiver Logic (GTL) JEDEC standard
JESD 8-3. The ac specification of the SN74GTLP1394 is given only at the preferred higher noise margin GTLP,
but the user has the flexibility of using this device at either GTL (V
TT
= 1.2 V and V
REF
= 0.8 V) or GTLP
(V
TT
= 1.5 V and V
REF
= 1 V) signal levels.
Normally, the B port operates at GTLP signal levels. The A-port and control inputs operate at LVTTL logic levels,
but are 5-V tolerant and are compatible with TTL and 5-V CMOS inputs. V
REF
is the B port differential input
reference voltage.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
D, DGV, OR PW PACKAGE
(TOP VIEW)
1
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16
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9
OEBY
Y1
Y2
V
CC
A1
A2
OEAB
ERC
BIAS V
CC
GND
B1
GND
B2
GND
V
REF
T/C
OEC, TI, and TI-OPC are trademarks of Texas Instruments.